数字电路7.5.ppt

1、1 1 Construct a state/output table State minimization（状态最小化）（状态最小化）State assignment（状态赋值）（状态赋值）Construct a transition/output table Choose a flip-flop type（确定特征方程）（确定特征方程）Construct an excitation table Derive excitation equations Derive output equations Draw a logic diagram逻辑抽象逻辑抽象(由当前状态、未来状由当前状态、未来状态

2、推导激励信号取值态推导激励信号取值)组合逻辑设计组合逻辑设计(当前状态和输入的函数当前状态和输入的函数)The detailed steps of state machine design:2 2 The first method to derive excitation equations is:The second method to derive excitation equations is:(Construct it directly using the transition equations and characteristic equation.)application tab

3、leexcitation tableexcitation equationtransition tableKarnaugh maptransition equationexcitation equationtransition tablecharacteristic equation3 3Example 2 Example 2(P554)(P554)Design a clocked synchronous state machine with two inputs,A and B,and a single output Z that is 1 if:A had the same value a

4、t each of the two previous clock ticks,or B has been 1 since the last time that the first condition was true.Otherwise,the output should be 0.Fig.7-454 4SAB00 01 11 10S*ZMeaningMeaningInitial state INIT0A0A0A1A1A0Got a 0 on A Got a 1 on A A10OK0OK0Got 00 on A OK0A1A10A0A0OK1Got 11 on A OK1OK11OK0OK0

5、BOK1 A1因因B而而OK，A为为1 BOK11A0 BOK0OK1OK1因因B而而OK，A为为0 BOK01A0 BOK0OK1OK11OK0OK0BOK1 A1(1)Construct a state/output table5 5SAB00 01 11 10S*ZMeaningMeaningInitial state INIT0A0A0A1A1A0Got a 0 on A Got a 1 on A A10OK0OK0Got 00 on A OK0A1A10A0A0OK1Got 11 on A OK1OK11OK0OK0BOK1 A1因因B而而OK，A为为1 BOK11A0 BOK0OK

6、1OK1因因B而而OK，A为为0 BOK01A0 BOK0OK1OK11OK0OK0BOK1 A1(1)Construct a state/output table(2)State minimizationOK，A值为值为0OK，A值为值为0OK0OK0OK0OK1 OK，A值为值为1OK1 6 6Initial state INITA0Got a 0 on A Got a 1 on A A1OK，A值为值为0 OK0OK，A值为值为1 OK1SAB00 01 11 10S*Z0A0A0A1A10OK0OK0A1A10A0A0OK1OK11OK0OK0 A11A0OK1OK1OK0 OK15

7、5个状态个状态至少需至少需3 3位状态变量位状态变量 possible state assignmentspossible state assignments000100101110111了解：状态赋值的常用规则了解：状态赋值的常用规则(3)State assignment(2)State minimization(1)Construct a state/output table7 7 practical guidelines for making state assignments:practical guidelines for making state assignments:Choos

8、e an initial coded state into which the machine can easily be forced at reset.Minimize the number of state variables that change on each transition.Maximize the number of state variables that dont change in a group of related states.Exploit symmetries in the problem specification and the correspondi

9、ng symmetries in the state table.Decompose the set of state variables into individual bits or fields.Consider using more than the minimum number of state variables to make a decomposed assignment possible.(P561)了解：状态赋值的常用规则了解：状态赋值的常用规则8 8(4)Construct a transition/output tableINITA0A1OK0OK1SAB00 01 1

10、1 10S*Z0A0A0A1A10OK0OK0A1A10A0A0OK1OK11OK0OK0 A11A0OK1OK1OK0 OK1 000100100100100100100101110101101101101101110110110110110111111111111111111Q1Q2Q3Q1*Q2*Q3*(5)Choose D flip-flop,and construct an excitation tableexcitation tableD1 D2 D39 9INITA0A1OK0OK1SAB00 01 11 10S*Z0A0A0A1A10OK0OK0A1A10A0A0OK1OK11

11、OK0OK0 A11A0OK1OK1OK0 OK1 000100100100100100100101110101101101101101110110110110110111111111111111111Q1Q2Q3Q1*Q2*Q3*D1 D2 D3excitation table(6)Derive excitation equations and output equations5输入输入(A,B,Q1,Q2,Q3)4输出输出(D1,D2,D3,Z)Minimal risk disposition:Minimal risk disposition:unused state initial st

12、ate 000D3=Q2Q3A+Q1AD2=Q1Q3A+Q1Q3A+Q1Q2BD1=Q2Q3+Q1excitation equationsoutput equation:Z=Q1Q2(7)Draw a logic diagram(omitted)(P565 Fig.7-50)1010Example 3 Example 3 1s-counting machine:if the number of 1 on two inputs(X and Y)since reset is a multiple of 4,then the output(Z)is 1,else 0.(7.4.6 P566)(7.4

13、.6 P566)1Got zero 1s S0S0XY 00 01 11 10ZMeaningMeaning SS*S1Got one 1 S1S2Got two 1s S2S10S1S2S3Got three 1s S3S20S2S3S0S3S3S0S1S0011 11Example 4Example 4“Combination lock”state machine:If the sequence of inputs received on X is“01101110”,then unlock(UNLK=1).(7.4.6 P568)(7.4.6 P568)SX0 1S*,UNLK HINK

14、Start AGot 0 BGot 01 CGot 011 DGot 0110 EGot 01101 FGot 011011 GGot 0110111 HB,01 A,00B,00 C,01B,00 D,01E,01 A,00B,00 F,01B,00 G,01E,00 H,01B,11 A,00 one input:X two outputs:UNKL,HINT1212Example 5Example 5 Design a sequence detector to detect“110”.电路检测到输入电路检测到输入(A)(A)序列为序列为110110时，输出时，输出(Z)(Z)为为1 1。

15、MealyMealy machinemachineSTA,0A1,0STA,0 A11,0STA,1 A11,0STAA1A11SA0 1S*,ZStart,waiting for 1 Got 1 on A Got 11 on A 1313Example 6 Example 6 Design a modulo-8 binary counter.0 0 00 0 10 1 00 1 11 0 01 0 11 1 01 1 1Q2 Q1 Q0Q2*Q1*Q0*CS0S1S2S3S4S5S6S70 0 10 1 00 1 11 0 01 0 11 1 01 1 10 0 000000001功能：对时

16、钟信号计数，可不用输入；功能：对时钟信号计数，可不用输入；Moore机机输出为进位信号输出为进位信号C；八个有效状态八个有效状态S0S7，采用自然二进制数，采用自然二进制数000111进行编码。进行编码。Q0*=Q0Output equation:C=Q3 Q2 Q1Q1*=Q1Q0+Q1Q0Q2*=Q2Q1Q0+Q2Q1+Q2Q0Transition equations:14147.7.5 Designing state machines using state 5 Designing state machines using state diagramsdiagramsexcitation

17、 tabletransition tableexcitation equationstate tabletransition equation Design using state-tableDesign using state-table Design using state-diagramDesign using state-diagram（用状态图设计状态机）（用状态图设计状态机）transition equationtransition listexcitation equationstate diagram1515LALBLCRARBRC 三输入：三输入：Left（左转）（左转）、R

18、ight（右转）（右转）、HAZ（应急告警应急告警）输出：控制输出：控制6个灯亮或灭个灯亮或灭 可完全由状态来确定可完全由状态来确定State machine for Thunderbird tail lights controlState machine for Thunderbird tail lights controlLeft turnLeft turnHazard modeMooreMoore机机1616Output tableThe state alone determines the output.8 states:IDLE:all offL1:1 lefthand light

19、onL2:2 lefthand lights onL3:3 lefthand lights onR1:1 righthand light onR2:2 righthand lights onR3:3 righthand lights onLR3:all onLA=L1+L2+L3+LR3LB=L2+L3+LR3LC=L3+LR3Output equations:RA=R1+R2+R3+LR3RB=R2+R3+LR3RC=R3+LR31717IDLEL1LL21L311R1RR21R311LR3H1HLRH+LRLHRRHLIDLEIDLE状态存在状态存在“二义二义性性”需改进！IDLE:all

20、 offL1:1 lefthand light onL2:2 lefthand lights onL3:3 lefthand lights onR1:1 righthand light onR2:2 righthand lights onR3:3 righthand lights onLR3:all on(1)Construct state diagram1818IDLEL1LL21L311R1RR21R311LR3H1HLRH+LRLHRRHL All inclusion All inclusion 完备性完备性 The logic sum of the transition express

21、ions on all arcs leaving that state is 1.(unambiguous)HHHH Mutual exclusion Mutual exclusion 互斥性互斥性The logic product of each possible pair of transition expressions on arcs leaving that state is 0.状态图的设计必须注意状态的互斥性和完备性。考虑到实际情况：考虑到实际情况：转弯过程中告警的处理转弯过程中告警的处理HHHH还需改进！(1)Construct state diagram19190 0 00

22、0 10 1 10 1 01 0 11 1 11 1 01 0 0IDLEL1L2L3R1R2R3LR3SQ2 Q1 Q08 8 states states 3 3 state variablesstate variablesGray code sequenceGray code sequence(3)Construct transition listReasonable State Reasonable State assignment!assignment!(1)Construct state diagram(2)State assignment2020S Q2 Q1 Q0Transiti

23、onexpressionS*Q2*Q1*Q0*0 0 00 0 00 0 00 0 0HLRLHRRHLH+LR0 0 00 0 11 0 11 0 0IDLEIDLEL1R1LR3L10 0 10 0 1HHL2LR30 1 01 0 0(3)Construct transition list(1)Construct state diagram(2)State assignment2121S Q2Q1Q0TransitionexpressionS*Q2*Q1*Q0*HLRLHRRHLH+LR0 0 00 0 00 0 00 0 00 0 00 0 11 0 11 0 0IDLEIDLEL1R

24、1LR3L10 0 10 0 1L2LR30 1 11 0 0HHL20 1 10 1 1L3LR30 1 01 0 0HHL30 1 0IDLE0 0 01R11 0 11 0 1R2LR31 1 11 0 0HHR21 1 11 1 1R3LR31 1 01 0 0HHR31 1 0IDLE0 0 01LR31 0 0IDLE0 0 01(4)Derive transition equations(transition p-term)rows where Qi*=1 transition p-term:The product of the current states minterm an

25、d the transition expression.Q0*=Q2Q1Q0(LHR)+Q2Q1Q0(RHL)+Q2Q1Q0(H)+Q2Q1Q0(H)=Q2Q1 Q0 H(L R)+Q1Q0Htransition listQi*=Table 7-142222S Q2Q1Q0TransitionexpressionS*Q2*Q1*Q0*HLRLHRRHLH+LR0 0 00 0 00 0 00 0 00 0 00 0 11 0 11 0 0IDLEIDLEL1R1LR3L10 0 10 0 1L2LR30 1 11 0 0HHL20 1 10 1 1L3LR30 1 01 0 0HHL30 1

26、0IDLE0 0 01R11 0 11 0 1R2LR31 1 11 0 0HHR21 1 11 1 1R3LR31 1 01 0 0HHR31 1 0IDLE0 0 01LR31 0 0IDLE0 0 01(4)Derive transition equationstransition listQ1*=Q0HQ2*=Q2Q1 Q0(H+R)+Q2Q0H+Q2Q0若用若用D触发器，有触发器，有D0=Q0*=D1=Q1*=D2=Q2*=(6)Realizing(omitted)用用J-K触发器呢？触发器呢？(5)Derive excitation equationsTable 7-142323第五次作业 提示：用提示：用LALC和和RARC作状态变量（取代作状态变量（取代Q2Q1Q0），），参照参照P572 Fig.7-56的输出表对的输出表对IDLE等等8种状态进行赋值。种状态进行赋值。7.447.21(c)7.22只写出转移列表和只写出转移列表和LA的转移方程。的转移方程。提示：提示：INIT无效后，检测到无效后，检测到X输入输入1100或或0011，则输出，则输出Z为为1。