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类型DisplayPort-物理层测试的挑战讲课讲稿课件.ppt

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    DisplayPort 物理层 测试 挑战 讲课 讲稿 课件
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    1、DisplayPort Testing ChallengesAgenda5/23/13 D i s p l a y P o rt Overview D i s p l a y P o rt 1.2 updates DisplayPort 1.2 Transmitter TestingWhats New:T2,TP3,TP3EQPhysical Layer Test Overview for DP1.2 Manual measurements/DPOJET/SDLA CTLE required in RxDP-AUX:Control DUT parameters Controls ALL TX.

    2、RX devices without vendor-specific control SW Test Automation:Full Main Link testing with DP12 Automated tool setDP 1.2 Tx:Including Single-Ended and Diff Measurements(Intra-Pair Skew,AC Common Mode)Using RF Switch Integration Improved Debug Tools DisplayPort Sink/Receiver TestingBSA125C configurati

    3、ons towards Rx testingJitter Impairment profile and observation times e D P testing for eDP 1.4 specification MyDP updateRef:VESA DisplayPort PHY Compliance Test Specification Version 1.2DisplayPort Technology OverviewDisplayPort is expanding its foot print Standard DisplayPort Specification Version

    4、 1.2 CTS Version 1.2b Data Rates 1.62GBps,2.7Gbps and 5.4Gbps Box to Box(1,2,4 lanes)e D P Specification Version 1.4 CTG in progress Data Rates 1.62GBps,2.7Gbps and 5.4Gbps Embedded(single box Laptops)(1,2,4 lanes M y D P Specification Version 1.0 CTS Version 1.0(in approval)Data Rates 1.62GBps,2.7G

    5、bps and 5.4Gbps Mobiles(1 lane)i D P Specification Version 1.1 CTG Data Rates 3.24,3.78 LVDS replacement)5/23/13DisplayPort 1.2 Overview5/23/13 T h e DisplayPort PHY Compliance Test Specification establishes a test regimen to determine compliance of DisplayPort devices-segmented into:Source Receiver

    6、 Copper Cable Hybrid devices Tethered devices Test Point Definitions TP1:at the pins of the transmitter device.TP2:at the test interface on a test access fixture TP3:at the test interface on a test access TP3_EQ:TP3 with equalizer applied.TP4:at the pins of a receiving deviceDisplayPort CTS1.2bSourc

    7、e Test Suite 1.EYE Diagram 2.Non Pre-Emphasis Level Verification 3.Pre-Emphasis Level Verification and Maximum Differen 4.Inter-pair Skew 5.Intra-Pair Skew 6.Differential Transition Time 7.Single Ended Rise and Fall Time Mismatch 8.Overshoot and Undershoot Test 9.Frequency Accuracy 1 0.AC Common Mod

    8、e Noise 1 1.Non ISI Jitter Measurement 1 2.Total Jitter and Random Jitter Measurement 1 3.Unit Interval 1 4.Main Link Frequency Compliance Stability 1 5.Spread Spectrum Modulation Frequency 1 6.Spread Spectrum Deviation 17.dF/dt Spread Spectrum Deviation HF Variationtial Pk-Pk Output Voltage D U T C

    9、onfiguration1.Bit Rates:RBR,HBR or HBR22.Patterns:D10.2,PRBS7,COMP,PLTPAT,PCTPAT3.FFE(Pre-Emphasis):0dB,3.5dB,6dB,9.5dB4.Output Levels:400mV,600mV,800mV,1200mV 5.SSC(Spread Spectrum):On/Off 6.Post-Curser2:Level 0,1,2,3 7.Lane Width,1,2,45/23/13 1 8.Dual-mode TMDS Clock(if supported)1 9.Dual-mode EYE

    10、 Diagram Testing(if supported)Eye Diagram Test using Eye Compliance PatternAn Eye diagram test for 800mV,0dB pre-emphasis at TP2,TP3,TP3-EQ.5/23/13DisplayPort 1.2 CTLE Properties5/23/131.2 CTS requires adaptive application of one of three reference equalizers to the far end signal,to find a passing

    11、condition.Key Elements of DisplayPort 1.2 Transition:Eye Diagram/Mask 1.2 CTS Requires Adaptive Eye Diagram Find the highest vertical eye point between.375-.625 UI at 10E-9BER Analytical tools which examine the vertical noise components project the Rn components to 10E9 BER.These tools have been pro

    12、ven in the field in SATA where they have been deployed for over two years.5/23/13Key Elements of DisplayPort 1.2 Transition:dFdTWhile dFdT measurements have a unique origin emerging from the SATA and SAS specifications where the history of examining SATA dFdT has led this to become a highly recommen

    13、d analysis.The dFdT contributing components will rarely appear in the normal Jitter budget due to their low frequency nature.5/23/13DisplayPort Auxiliary Channel Controller(DP-AUX)nHPDnAux Channeln S p e e d s Up Test Time-No User Interaction is Required to Change Source Output Signal or Validate Si

    14、nk Silicon State or Error Countn N o Need to Learn Vendor-specific Software-A Single GUI Supports All Vendorsn V i e w&Log Decoded AUX Traffic and Hot Plug Detect(HPD)Events from the Device under Test to the DP-AUX DisplayPort AUX Controllern A b i l i ty to Read and Write DPCD Registers Supports De

    15、bug Activitiesn Tektronix DP-AUX can serves as a DP1.2 Sink-Enables source to transmit the required patterns for testing.5/23/13Why use AUX channel controller in physical layer testing?Automation:DisplayPort testing is a large task!5/23/13Combination Parameters For DP1.2 TestingData Rate LanesPre-Em

    16、phasis Voltage Swing Post Cursor2 SSCPatterns-3-4-4 Levels-4 Levels-4 Levels-2 Levels(SSC On and Off)-5 Supported PatternsCombination of Tests1.Differential Tests2.Single Ended Tests432 Acquired signals for DP1.2 Normative Measurements per lane.X4 lanes results in 1728 Automated Acquisitions per DUT

    17、.TestWaveforms(SSC,4 Lanes Possible Combinations)Eye Diagram Test80Pre-Emphasis Test240Non-Pre-Emphasis32Total Jitter80TekExpress DisplayPort 1.2 Automation Comprehensive DisplayPort Version 1.2 Physical Layer Conformance and Compliance Verification Tool All Core DP1.2 measurements Keithley RF Switc

    18、h and DP-AUX fully automated solution.Selected measurements can be applied across all test permutations(SSC,CTLEs,swing,rates,pre-emphasis,etc.)translates to 1728 measurements.DP1.2 will provide full user intervention free,automated testing.This is the killer value proposition.Factory Automation API

    19、 for full product control in silicon automation systems.Complimentary Fixtures and Compliance Interconnect Channel HW defined by VESA make this package a full customer solution with no compromises.5/23/13DisplayPort 1.2 Test Selection D P 1.2Measurement selection is now provided as a function of the

    20、 user specified test target capabilities.If Post Curser 2 capabilities are not present in the DUT,the measurement list will not show them.Configuration schematics and online help available for all measurements5/23/13DisplayPort 1.2 Acquisitions D P 1.2Various signal interconnect methods are supporte

    21、d.Direct TCA(SMA input)on user selected channels.Differential Probe(P7313SMA)inputs for true 4 channel concurrent interconnect.(No single ended measurements)24:4 Keithley RF Switch allows fully automated control of all 8 single ended inputs for hands free comprehensive testing.Test PatternsAutomatic

    22、 verification of test patterns(which can be disabled)ensures the correct patterns are used for the correct test under manual operation.5/23/13Keithley RF Switch Integration and AutomationDisplayPort transmitter has both Differential tests and Single ended tests and with the integration of RF switch

    23、we have complete automated solution without any user intervention for switching between lanes with both single ended and differential tests in sequential automated passes.Keithley is now part of Tektronix.5/23/13DisplayPort 1.2 User Preferences D P 1.2 User defined test margin controls and auto high

    24、lighting of measurements within a user specified tolerance of either the standard spec limits or user defined custom limits.Email controls allow notification of test conditions directly to users.5/23/13DisplayPort 1.2 Reporting D P 1.2 Custom html reports which include user specified degrees of deta

    25、il.Reports and Session raw data are stored together allowing recalling a previous run and re-running the test(with different measurement configurations or limits)and re-generating a new report,without the actual DUT present.5/23/13Conventional DisplayPort Fixtures+CIC P a rtnership with Wilder Techn

    26、ologies to design and channel high performance DP fixtures Wilder TF-DP-TPA-PRC fixtures and CIC and fixtures available directly from Tektronix5/23/13Receiver testing is performed with a Tektronix BSA125C BertScope and Wilder HBR2 ISI Channel.BER observation times range from 37 seconds to 10.5 minut

    27、es depending on the data rate and jitter frequency being tested.e version 1.2 CTS outlines 17 Tx validation tests which are typically evaluated with a 12.5GHz or higher bandwidth oscilloscope.DisplayPort 1.2Sink(Rx)Test Overview5/23/13Four Principal Test Frequencies at 2,10,20 and 100 MHz SJDisplayP

    28、ort 1.2Sink(Rx)Test Observation Time5/23/13BertScope Receiver Test SolutionTypical Configuration BertScope BSA85C Option STR DPP125A(no 4T needed)BSA12500ISI DP-AUX TF-DP-CIC-C1 Wilder DP 1.2 ISI Board5/23/13Two Tone SJ,with Stationary HFSJ Parked at 200 MHz.New HFSJ source for fixed 200 MHz SJ as r

    29、equired by DP1.2.5/23/13DisplayPort 1.2Crosstalk(BUJ)ConfigurationGenerator page showing Patterns and capability of generation large amount Crosstalk with differential sub-rate Clock Outputs.5/23/13DisplayPort 1.2-High end BeRTScope configurationTo DUT5/23/13BSAITS125 generates multiple,fixed select

    30、ions for ISIUse BERTScope DPPB or DPPC to generate low pass filter to fine tune ISIOn BSAITS GUI,you can simplydial in the amount of ISI neededand DPP and BSAITS will adjust to generate requested ISICan automate calibration when using BSAITS with DPPCan precisely tune ISI at all data ratesCan genera

    31、te additional ISI to test margin of DUTDisplayPort 1.2-High end BeRTScope configurationRBR ISI created using BSAITS and DPP125BDisplayPort 1.2-High end BeRTScope configurationEmbedded DisplayPort-eDP Typical connection5/23/13eDP source measurements:Test 3.1-Eye Diagram Test Test 3.2-Inter Pair Skew

    32、testTest 3.3-Non-ISI Jitter MeasurementsTest 3.4-Total JitterTest 3.5-Deterministic jitter Test 3.6-Random JitterTest 3.7-Main Link Frequency StabilityTest 3.8-Spread Spectrum Modulation Frequency Test 3.9-Spread Spectrum Modulation DeviationEmbedded DisplayPort-eDP5/23/13Oscilloscope RequirementsOp

    33、tion EDP requires a DPO/DSA/MSO 70K scope running firmware version6.4.0 or higher and DPOJet version 6.0 or higher.For customers testing RBR(1.62 Gb/sec)and HBR(2.7 Gb/sec)a minimum bandwidth of 8Ghz is required.For customers testing HBR2(5.4 Gb/sec)a minimum 12.5GHz BW is required.ProbingFor custom

    34、ers testing RBR(1.62 Gb/sec)or HBR(2.7 Gb/sec)Qty 4 P7380 or P7380SMA are required if testing more then two lanes at one time.For customers testing HBR2(5.4 Gb/sec)and HBR(2.7 Gb/sec)and RBR(1.62 Gb/sec)Qty 4 P7313 or P7313MA are required if testing more then two lanes at one time.An optional eDP fi

    35、xture is available on the Tektronix PAL:TF-EDP-TPA-PRCEmbedded DisplayPort-eDP5/23/13Embedded(eDP)Fixturing5/23/13 2 0-P i n eDP Connector for CCFL Backlight(1 or 2 Lane eDP)3 0-P i n eDP Connector for LED Backlight w/o LED Driver on PCB(1 or 2 Lane eDP 3 0-P i n eDP Connector for LED Backlight with

    36、 LED Driver on PCB(1 or 2 Lane eDP 4 0-P i n eDP Connector for LED Backlight with LED Driver on PCB(up to 4 Lane eDP)MyDP-Typical connection5/23/13MyDP-PHY tests for Source5/23/13Most tests will be similar to standard DP 1.2 ONE LANE testsMyDP-PHY tests for SinkSink Test will be similar to standard

    37、DP 1.2 ONE LANE testsBSAITS125generatesmultiple,fixed selections for ISIUse BERTScope DPPB or DPPC to generate low pass filter to fine tune ISIOn BSAITSGUI,you cansimply dial in the amount of ISI needed and DPP and BSAITS will adjust to generate requested ISI5/23/13Can automate calibration when usin

    38、g BSAITSwith DPP Can precisely tune ISI at all data ratesCan generate additional ISI to test margin of DUTComplete Tektronix DisplayPort Instrument Portfolio5/23/13Receiver/Sink Tests(Compliance/Characterization)Receiver Silicon characterization and compliance testing capability to 26GbpsBSA125C wit

    39、h JMAP and SSC and HW Options DPP 125A and CR125A provide support for future bit-rates(12-26G)with a unique portfolio of Scope and Bert combined features.DP Channel TestsSource and Sink electrical channel performance,Crosstalk,Impedance and return loss.High Dynamic Range instrumentDSA830080E10 TDR S

    40、ampling Module for DSA8200 Sampling Scope S-Parameter Analysis Software 80SICON SoftwareCable TestsCable crosstalk,skew and frequency domain measurements,sdd21,sdd11.DSA83004X 80E08 TDR Sampling Module for DSA8300 Sampling ScopeTransmitter/Source TestsSignal timing stability and SSC analysis,Transmitter AC parametric,Jitter,Amplitude.DSA71254CDPOJET Jitter Analysis software SMA Adapters TCA-SMA 2 per scopeDifferential SMA Probe P7313SMA(optional)+DP-AUX controller+DP12(Sw Option)THANK YOU5/23/13

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