半导体技术发展趋势及中芯国际RD课件.ppt
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1、Semiconductor Technology Trends&SMICs R&D to Supply Manufacturing TechnologiesDr.Shiuh-Wuu Lee 李序武博士Executive VP,Technology R&D,SMICOct 23th,20142014北京微电子国际研讨会Safe Harbor StatementsUnder the Private Securities Litigation Reform Act of 1995lThis document contains,in addition to historical information
2、,“forward-looking statements”within the meaning of the“safe harbor”provisions of the U.S.Private Securities Litigation Reform Act of 1995.These forward-looking statements are based on SMICs current assumptions,expectations and projections about future events.SMIC uses words like“believe,”“anticipate
3、,”“intend,”“estimate,”“expect,”“project”and similar expressions to identify forward looking statements,although not all forward-looking statements contain these words.These forward-looking statements are necessarily estimates reflecting the best judgment of SMICs senior management and involve signif
4、icant risks,both known and unknown,uncertainties and other factors that may cause SMICs actual performance,financial condition or results of operations to be materially different from those suggested by the forward-looking statements including,among others,risks associated with cyclicality and marke
5、t conditions in the semiconductor industry,intense competition,timely wafer acceptance by SMICs customers,timely introduction of new technologies,SMICs ability to ramp new products into volume,supply and demand for semiconductor foundry services,industry overcapacity,shortages in equipment,component
6、s and raw materials,availability of manufacturing capacity,financial stability in end markets and intensive intellectual property litigation in high tech industry.lIn addition to the information contained in this document,you should also consider the information contained in our other filings with t
7、he SEC,including our annual report on Form 20-F filed with the SEC on April 14,2014,especially in the“Risk Factors”section and such other documents that we may file with the SEC or SEHK from time to time,including on Form 6-K.Other unknown or unpredictable factors also could have material adverse ef
8、fects on our future results,performance or achievements.In light of these risks,uncertainties,assumptions and factors,the forward-looking events discussed in this document may not occur.You are cautioned not to place undue reliance on these forward-looking statements,which speak only as of the date
9、stated or,if no date is stated,as of the date of this document.2Outline1.Major Technology Challenges2.SMICs Technology R&D Strategies and Plans(1)Continue to build&enhance high quality and innovative R&D at SMIC(2)Place significant focus on leading-edge differentiation technologies(3)Strengthen R&D
10、on advanced CMOS technology(4)Enrich design IP to actively support design houses for faster TTM(5)Actively drive the growth in domestic IC industry chain3.Concluding Remarks3国际主流逻辑技术路线图1H132H131H142H141H152H152H121H162H161H172H17Skip 20nm Planar14nm FF16nm FF14nm FF14nm FF14nm FF22nm FFSpeculated14n
11、m FFTrial/NTOMPFoundryTGFUSamsung(Intel)国际主流公司未来五年逻辑技术路线图,各公司均加快了科研进度,多数公司在未来五年均拟推出3代或3代以上技术产品。20nm Planar20nm Planar10nm FinFET10nm FinFET10nm FinFET10nm FinFET7nm FinFET7nm FinFET7nm FinFET7nm FinFET Pre-manufacture TechnologiesManufacture Technologies4落后2-3年摘自:北京大学王阳元摘自:北京大学王阳元,20125 光刻技术 新材料 工艺误
12、差 新结构 工艺集成芯片制造技术中的五大技术挑战6技术挑战-1:精密图形转换?如何用193纳米波长光源形成65-20纳米特征长度的图形?1.光学修正(OPC),相移掩膜(Phase Shift Mask)2.浸没式光刻(Immersion Litho)3.多重曝光和刻蚀(Multiple Patterning)7光刻技术的瓶颈三因素Phase Shift MaskOff-axis illumination.8 光学修正技术使得图形比波长短 光掩模图形图形光掩模9Design Rule of Critical Layers Contact PL PitchFin193nm Happy Days1
13、93nm 光刻的瓶颈193纳米光刻技术支撑CMOS发展65-14nm10新材料在CMOS中的应用本世纪来:47种新材料进入集成电路制造.共计64种材料.12547技术挑战-2:新材料新工艺11 新材料技术带来的器件性能提高0.13um 90nm 65nm 45nm 32nm12产品技术杀手:工艺随机误差 技术挑战-3:工艺误差DFM:研究工艺误差带来的器件产品性能变化,并提出解决方案。APC:及时发现工艺异常.13Direct impact:SRAM yield Circuit performance and design margin Indirect impact:Reliability
14、Mobility Manufacturing control挑战:在低电压下获得高电流和少泄漏 即在低电源电压情况下(低电压可以获得好的功耗指标),要设法获得更大的驱动能力和更小的晶体管延时(提高性能)。显然,在传统的体硅平面器件上,已很难实现上述要求。栅泄漏电流寄生电阻短沟效应迁移率退化波动性动态功耗驱动能力:IDSat=CgvinjCg(Vdd-Vt)eff功耗:P=CgVdd2f+IleakageVdd速度:g=CgVdd/IDSat来源:北京大学黎明研究员体硅平面工艺似乎走到尽头?技术挑战-4:新结构14 3维晶体管FinFET功函数高K材料源漏电阻电路模型沟道材料接触电阻q新器件的设
15、计问题新一代FinFET器件的结构优化应力分布模拟、迁移率提取、输运机制、可靠性与涨落特性器件结构参数和工艺参数对电路性能的影响q可制造性问题栅泄漏电流,功函数调节,源漏串联电阻及接触电阻等关键问题材料体系与工艺技术的稳定性可靠性问题q大生产平台上工艺集成问题自对准多次曝光技术,纳米级Fin和Gate的光刻和刻蚀,节距的缩小带来的原子水平的间隙填充,低介电常数侧墙,超低K铜互连等。158001000140065nm45nm20nm65-14纳米CMOS工艺流程复杂度技术挑战-5:工艺集成技术每一代新技术需要约20%以上的工艺设备添置和更新几乎每步工艺需要实验,关键工艺需要数百次120032nm
16、160014nm16Outline1.Major Technology Challenges2.SMICs Technology R&D Strategies and Plans(1)Continue to build&enhance high quality and innovative R&D at SMIC(2)Place significant focus on leading-edge differentiation technologies(3)Strengthen R&D on advanced CMOS technology(4)Enrich design IP to acti
17、vely support design houses for faster TTM(5)Actively drive the growth in domestic IC industry chain3.Concluding Remarks17HV0.13m0.16m0.20m0.25m0.35mLCOS0.13m0.18m0.25m0.35mMEMS0.13m0.18m14nm28nmRF/MS28nm40nm55nm65nm90nm0.13m0.18mSOC platformsFlash(ETOX)38nm45nm65nm90nm0.13m0.18m0.25me-Flash55nm90nm0
18、.11m0.13m0.18mImager55nm BSI90nm FSI/BSI0.11m BSI0.13m FSI0.15m FSI0.18m FSIEEPROM0.11m0.13m0.18m0.35m40nm65/55nm90nm0.11m0.13m0.15m0.18m0.25m0.35mLogicBaselinePMIC0.13m0.18m0.35mSOC platformsSMICs Two-Pronged Technology Strategy1828nm Readiness and MPW Milestones1st SMIC 28nm MPW Dec/2013MPW28PS&28
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