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    拉扎维《模拟集成电路设计》第二版Ch5课件.ppt

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    拉扎维《模拟集成电路设计》第二版Ch5课件.ppt

    1、Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.Chapter 5:Current Mirrors and BiasingTechniques5.1 Basic Current Mirrors5.2 Cascode Current Mirrors5.3 Active Current Mirrors5.4 Biasing Techniques Copy

    2、right 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.2Basic Current Mirrors AssumingM1 is in saturation,we can write The threshold voltage may vary by 50 to 100 mV from wafer to wafer Both n and VTH exhibit te

    3、mperature dependence We must seek other methods of biasingMOS current sources.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.3Conceptual means of copying currents Use of a reference to generate vario

    4、us currents.Two identical MOS devices that have equal gate-source voltages and operate in saturation carry equal currents Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.4Effect of Channel-Length Modu

    5、lation Neglecting channel-length modulation,we can write Allows precise copying of the current with no dependence on process and temperature Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.5Sizing iss

    6、ues Current mirrors usually employ the same length for all of the transistors.Current ratioing is achieved by only scaling the width of transistors.Direct scaling of the width also faces difficulties.We thus prefer to employ a“unit”transistor and create copies by repeating such a device.Copyright 20

    7、17 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.6Sizing Issues How do we generate a current equal to IREF/2=2 from IREF?(a)half-width device,and(b)series transistors Approach(b)preserves an effective length of(Ld

    8、rawn-2LD)for each unit,yielding an equivalent length of 2(Ldrawn-2LD)Current mirrors can process signals as well,example next slide.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.7Example Calculate t

    9、he small-signal voltage gain of the circuit shown in Figure.Gain=Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.8Cascode Current Mirrors While ,may not equal We can(a)force VDS2 to be equal to VDS1,o

    10、r(b)force VDS1 to be equal to VDS2.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.9First Approach A cascode device can shield a current source,thereby reducing the voltage variations across it.But,ho

    11、w do we ensure that VDS2=VDS1?We must generate Vb such that Vb-VGS3=VDS1(=VGS1)Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.10Example sketch VX and VY as a function of IREF.If IREF requires 0.5 V t

    12、o operate as a current source,what is its maximum value?Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.11Example the minimum allowable voltage at node P is equal to The cascode mirror“wastes”one thre

    13、shold voltage in the headroom.Because VDS2=VGS2,whereas VDS2 could be as low as VGS2-VTH while maintaining M2 in saturation.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.12Approach summary In Fig(a)

    14、,Vb is chosen to allow the lowest possible value of VP but the output current does not accurately track IREF.In Fig(b),a higher accuracy is achieved,but the minimum level at P is higher by one threshold voltage.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution

    15、without the prior written consent of McGraw-Hill Education.13Second Approach Consider the branch shown in Fig.5.16(b)As a candidate and write Vb=VGS5+R6I6.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Educati

    16、on.14Small signal Model Reduces to 1/gm in the absence of channel-length modulation.Thus,from a small-signal point of view,the combination is close to a diode-connected device.But(1)It may be difficult to guarantee that(2)The generation ofis not straightforward.Copyright 2017 McGraw-Hill Education.A

    17、ll rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.15Generate Vb Consider the branch shown in Fig(b)as a candidate and write Vb=VGS5+R6I6.VGS5=VGS3 However,the condition I is hard to meet.Copyright 2017 McGraw-Hill Education.All rights reser

    18、ved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.16Generate Vb It is now possible to ensure that VGS6 and VGS1 track each other.For example,we may simply choose I6=IREF,R6=R1,and(W/L)6=(W=/L)1 Copyright 2017 McGraw-Hill Education.All rights reserved.No r

    19、eproduction or distribution without the prior written consent of McGraw-Hill Education.17Another circuit topology In this case Must have for M0 to be saturated and for M1 to be saturated.A solution exists if We must therefore sizeM0 to ensure its overdrive is well below VTH1.Copyright 2017 McGraw-Hi

    20、ll Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.18How to generate Vb In figure(a)Some inaccuracy nevertheless arises because M5 does not suffer from body effect whereas M0 does.Also,the magnitude of R6*I1 is not well-control

    21、led.A simpler alternative is shown in Fig(b)Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.19Example Voltage headroom is too small to allow the use of a cascode current source.Devise a method to redu

    22、ce the current mirror error due to channel-length modulation.The voltages at P0 and P track even if the CM level at A and B varies.The two differential pairs must incorporate the same lengths and scale their widths according to Wr/Wd=IREF/ISS.Copyright 2017 McGraw-Hill Education.All rights reserved.

    23、No reproduction or distribution without the prior written consent of McGraw-Hill Education.20Example An alternative current mirror exhibiting a high output impedance.Small signal:If we choose the net change in ID1 is small.Figure b for large signal.The above circuit does pose its own voltage headroo

    24、m limitation:VX must exceed VTH3.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.21Active Current Mirrors A five-transistor“operational transconductance amplifier”(OTA).Note that the output is single-

    25、ended,hence the circuit is sometimes used to convert differential signals to a single-ended output.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.22Quick Calculation We may simply discard one output

    26、of a differential pair as shown in Fig.What is the small-signal gain?Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.23Second Approach We calculate Vp/Vin and Vout/Vp Caculate Vout/Vp Copyright 2017 M

    27、cGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.24Differential Pair with Active Load The small-signal draincurrent of M1 is“wasted.”It is desirable to utilize this current with proper polarity at the output.This can

    28、be accomplished by the five-transistor OTA.M3 enhances the gain.The five-transistor OTA is also called a differential pair with active load.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.25Large-Sign

    29、al Analysis If Vin1 is much more negative than Vin2,Vout=0.As Vin1 approaches Vin2,The output voltage then depends on the difference between ID4 and ID2.For a small difference between Vin1 and Vin2,both M2 and M4 are saturated,providing a high gain.As Vin1 becomes more positive than Vin2,allowing Vo

    30、ut to rise and eventually driving M4 into the triode region.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.26Example For VDD=3 V,symmetry requires that Vout=VF.As VF and Vout fall below+1:5 V-VTH,M1

    31、and M2 enter the triode region,but their drain currents are constant if M5 is saturated.Eventually M5 into the triode region.Thereafter,the bias current of all of the transistors drops,lowering the rate at which Vout decreases.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction

    32、or distribution without the prior written consent of McGraw-Hill Education.27Example Sketch the large-signal input-output characteristic of the unity-gain buffer shown in Fig if the op amp is realized as a five-transistor OTA.We begin with Vin=0 and note that M1,M3,and M4 are off.As Vin rises,Vout V

    33、in.This unity-gain action continues as Vin increases.For a sufficiently high Vin:M1 and M4 went to triode region.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.28Small-Signal Analysis With small diff

    34、erential inputs,the voltage swings at nodes F and X are vastly different.The effects of VF and VX at node P(through rO1 and rO2,respectively)do not cancel each other and this node cannot be considered a virtual ground.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distri

    35、bution without the prior written consent of McGraw-Hill Education.29Approximate Analysis Node P can be approximated by a virtual ground.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.30Calculation of

    36、 Rout Any current flowing intoM1 must flow out of M2,and the role of the two transistors can be represented by a resistor The current drawn from VX by RXY is mirrored byM3 ontoM4 with unity gain.For Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the

    37、prior written consent of McGraw-Hill Education.31Exact Analysis We can viewthis result as our approximate solution,.multiplied by a“correction”factor that is less than unity.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of

    38、McGraw-Hill Education.32Headroom Issues The five-transistor OTA does not easily lend itself to low-voltage operation.The value of I1 must be much less than ISS/2.Insert a resistor in series with the gate and draw a constant current from it.Copyright 2017 McGraw-Hill Education.All rights reserved.No

    39、reproduction or distribution without the prior written consent of McGraw-Hill Education.33Common-Mode Properties Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.34CMRR Even with perfect symmetry,the o

    40、utput signal is corrupted by input CM variations.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.35Effect of Mismatches we consider the case where the input transistors exhibit slightly different tran

    41、sconductances。How does Vout depend on Vincm?This result contains the additional term Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.36Other Properties A finite CMRR even with perfectly matched transi

    42、stors.The supply rejection of this OTA is inferior.Change VDD by a small amount,how much does VF change?Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.37Other Properties For(a),The gain from VDD to V

    43、out is about unity.Now consider the fully-differential topology in Fig(b).In this case,too,the output voltages change by VDD but their difference remains intact.This circuit requires common-mode feedback.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without

    44、 the prior written consent of McGraw-Hill Education.38Biasing Techniques Simple CS Stage How do we ensure that VB does not“fight”Vin?Couple Vin capacitively and establish a high impedance for VB.Node X in Fig(b)must have a dc path to a voltage.The bias voltage must be generated by a diode-connected

    45、device Typically select IB about one-tenth to one-fifth of ID1 so as to minimize the power.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.39Biasing Using a MOSFET The capacitor and the resistor may o

    46、ccupy a large chip area.The capacitor introduces its own parasitics.In applications requiring a large RC product,one can replace RB with a long,narrow MOSFET.But how do we guarantee that MR does not turn off?The overdrive of MR must be well controlled.This difference can be created by means of a dio

    47、de-connected device.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.40Direct Coupling Possible to remove the input coupling capacitor and provide the bias voltage from the preceding stage?The bias con

    48、ditions of M1 are influenced by those of M2.The PVT variations are amplified.One can employ direct coupling between two stages if each has a low gain.Copyright 2017 McGraw-Hill Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.41

    49、CS Stage with Current-Source Load If the copied currents in Fig(b)are not exactly equal,each transistor wants to impose its own current.To resolve this issue,we modify the circuit as shown in Fig(c).Select We can draw a constant current of IG from RG,so that Vout is higher.Copyright 2017 McGraw-Hill

    50、 Education.All rights reserved.No reproduction or distribution without the prior written consent of McGraw-Hill Education.42Example Compare the maximum allowable voltage swings.In Fig(c),the up-swing cannot reach its maximum.In Fig.5.45(d),on the other hand,I-GRG can shift the operating point such t


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